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2 months ago

Job Summary

NVIDIA System-On-Chip (SOC) group is hiring for a Senior SOC Design Engineer! The complexity of the chips we build has increased manifold over the years. We are now packing tens of billions of transistors in a chip to meet the growing computing demand. We are looking for a star candidate with strong inclination in RTL integration and chip level front-end design, including padring, pinmuxing, SOC Assembly process, retiming etc. You must have a real passion for methodologies and automation solutions that enable SOC creation in the most optimized way. In this position, you will get the chance to build sophisticated Tegra SOCs, work closely with chip management to set ASIC execution timelines & goals while directly interacting with System Architecture, unit-level ASIC, Physical Design, CAD, Package Design, DFT and other teams. Additionally, you will be involved in defining and crafting methodologies that build more efficient and flexible SOCs in future.

  • Minimum Qualification: Degree
  • Experience Level: Senior level
  • Experience Length: 5 years

Job Description/Requirements

What You Will Be Doing:

  • Build and deliver highly optimized system software for Video subsystem.
  • Develop the Software in compliance with safety standards.
  • Be accountable for results
  • Make the right technical choices and tradeoffs governed by data driven development
  • Collaborate with multi-functional software teams contributing to roadmap
  • Optimize end to end use cases involving video subsystem
  • Continuous improvement of quality and performance of the software and set a higher standard


What we need to see:

  • B.Tech or M.Tech in Electronics Engineering or equivalent experience.
  • 5+ years of proven experience in chip design, specializing in SOC integration and design automation. Padring and fuse/floorsweep design experience is a bonus.
  • Excellent analytical and problem-solving skills.
  • Experience in RTL design (Verilog), System-On-Chip design/implementation flow.
  • Strong coding skills in Perl, Python, or other industry-standard scripting languages.
  • Exposure to various Chip Design Functions to be able to collaborate and solve complex multi-functional problems.


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